Thursday, August 9, 2012

AMD OpenCL Webinar Series – August Line Up

AMD OpenCL Webinar Series – August Line Up:
Graphics Core Next Architecture Overview
GCN is Designed to push not only the boundaries of DirectX® 11 gaming, the GCN Architecture is also AMD’s first design specifically engineered for general computing. Equipped with up to 32 compute units (2048 stream processors), each containing a scalar coprocessor, AMD’s 28nm GPUs are more than capable of handling workloads-and programming languages-traditionally exclusive to the processor. Coupled with the dramatic rise of GPU-aware programming languages like C++ AMP and OpenCL™, the GCN Architecture is truly the right architecture for the right time. Participate in this webinar to learn how you can take advantage of this new architecture in your GPGPU programs (North America – August 14, 2012 10AM Pacific Daylight savings Time; India- August 21, 2012, 5:30PM India Standard Time).
Performance Evaluation of AMD APARAPI Using Real World Applications

Java APARAPI (Java A PARallel API) allows Java developers to take advantage of the computational power of GPU and APU devices by executing java parallel code fragments on the GPU rather than being confined to the local CPU. This presentation aims at performance evaluation of APARAPI for execution of parallel Java code on GPU via OpenCL. Performance analysis is done by running real world problems programmed in Java using Aparapi. Each program is written in multi-threaded java to have proper comparison. There will around 15 real world programs which are commonly used and well known. This also have some tuning done in the APARAPI library (North America – August 21, 2012 9:30AM Pacific).
Overview of HSAIL – the basis for implementing an HSA platform agnostic open-source OpenCL runtime
HSAIL is a new virtual byte code and virtual machine designed for parallel compute on heterogeneous devices. HSAIL makes it easy to compile high performance code both for current and future architectures. HSAIL programs will run unchanged on future hardware . Unlike AMDIL which is the graphics byte code, HSAIL has been architected to support modern high level programming languages such as Java and C++. This talk will introduce HSAIL at a high level, go over the virtual machine, Next we will talk about the compilation model, the reasons for a byte code rather than an exposed ISA and how HSAIL opens up HSA hardware to compiler and tool developers. We will review how HSAIL is different from PTX/LLVM and Java Byte code. Finally we will go over the one HSAIL important aspects– the memory model. Unlike previous GPU byte codes, the HSAIL memory model uses a formal design based on acquire/release semantics (North America – August 28, 2012 10:00AM Pacific Daylight savings Time).


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